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    4,921 design spi interface fpga verilog vhdl jobs found, pricing in USD

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Mo...

    $193 (Avg Bid)
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    7 bids

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Mo...

    $146 (Avg Bid)
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    The aim of the project is to design a BIST controller to insert and detect the faults (defect) like Read disturbance, Erase disturbance, Program disturbance, SAF, TF, ADF, CFs, TF, NPSF, Retention fault in FLASH memory by using BIST algorithm like March algorithm using verilog or VHDL in Xilinx or Modelsim. Need Simulation waveforms for the same.

    $415 (Avg Bid)
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    In ready projekt on vhdl (tic tac toe game) I need to add state od the gamÄ™ on LCD [login to view URL]

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    Gerber Design: Dimension of PCB : 140 mm X 100 mm Major components : Microchip control PIC18F family Display : 3.5" TFT display MICROCHIP LAN : ENC23j60 SPI FLASH Memory USB FTDI series Maxim series of ADC

    $4 / hr (Avg Bid)
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    Needs to hire 2 Freelancers We are looking for designer to design Video object tracking : 1- CPU, CUDA based or FPGA accelerated algorithm . 2- Multi-target Detection/ tracking . 3- Moving object detection . 4- High accuracy , auto scaling , occlusion recovering . 5- fixed camera or moving camera. 6- Image Stabilization . 7- Move on Move tracking

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    DSP48E1 help 2 days left

    Hi! I need some help with DSP48E1 verilog instantiation.

    $4 / hr (Avg Bid)
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    We are looking for someone with engineering background, preferably knowledge in FPGA related stuff to translate some tehnical documents. Google translate is not acceptable.

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    I need to write a VHDL code for transfer data from 2 zedboard using ethernet without using a zynq-processor

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    Looking for a mentor in advanced FPGA development using Altera Max 10 FPGA board specifically.

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    1. Identify a good value and properly sized CPLD/FPGA and toolset (toolset needs to be relatively easy to configure) to accommodate the required functionality. 2. Develop the CPLD/FPGA code. The device needs to take as inputs a set of states (from a microcontroller so either as an I2C command or as a 3 digital input code, along with 3 digital inputs

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    ...server. I will need to have software to access and display the data in graph form. There are other components that I need that are not so detailed. I need consulting for the design and components to use for both the thermostats and the modem/router as well as software to access and display the data for a plug and play system. Project will have to use

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    I need some help with selling my services. I am verilog/ matlab coder and I need customers . you find me a client , I write his/her code and you get paid %30 of the project budget

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    I need a simple PCB design. The PCB should be square or rectangular with maximum dimensions of 9.5 cm x 9.5 cm. The PCB should hold 5 of the following boards: [login to view URL] There should be some minimal interconnection between the 5 boards (more details to be provided). The USB ports on each

    $392 (Avg Bid)
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    I have a unusual ADC/DAC/GPIO hybrid device connected to a Microcontroller via SPI. I need a driver for the ADC & DAC as well as digital IO from the device

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    Development of an embedded C driver for an ADC/DAC IC connected via SPI

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    I am looking for Xilinx SDx OpenCL expert, who can convert github miner project into FPGA hex file in Xilinx SDx. Don't bid if you do not have experience.

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    ...(prefered 32MX450F256H, but you can you others target if you want).. 32MX795 ...? as your development tool. the ETH WIZ click board can be used, or any other W5500 board with SPI bus. goal : provide full source code in Mikrobasic PRO PIC32 V4.0 including simple example which can work as web server (at least 1HTML page, 1CSS, 1 image) Feel free to message

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    I have a short project to do for an Altera 5M160Z CPLD (160 LE). This board has a 16-bit...Altera 5M160Z CPLD (160 LE). This board has a 16-bit bus from a MCU and 8 control lines and output to a 10-pin port. What I need is a VHDL project (Quartus) that will implement a custom full duplex parallel to serial design. Development using simulation is fine.

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    Reading of sensor via PMOD on FPGA Xillinx. More details via messenger Freelancer.com with full requirements.

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    I need to implement the project using fully parallel interleaver and QPP interleaver in FPGA platform. the language used for coding is Verilog and it is synthesized in Xilinx.

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    ...for 1 hour work max! We have the attached 128*128 image, i just need some fixes and to run it and produce the new image after the median filter we pass it through microblaze FPGA in the c program. I specifucally want: 1. instead of arrays i want the resulting image to come off like a txt if possible 2. i want inside the code to include the part we

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    Hello everybody, I want a simple median filter in c embedded through a micriblaze fFPGA. I have some part of the code ready. i need it in 1 hour. If you got it lets talk :)

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    add memory protection into the operating system, This project needs both hardware and software knowledge, you will be creating / implementing OS functions on the PicoBla...hardware and software knowledge, you will be creating / implementing OS functions on the PicoBlaze, programming in assembler. You may also need to modify the hardware using VHDL.

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    ...XMEGA A1U Micro-controller through SPI to two RF micro-controllers AX8052F100 that are connected to two transceivers, one acts as transmitter and the other acts as a receiver. I need someone who can write a code on AX8052F100 to do the following : the task is to write two code in code-block to access and configure the SPI, one time to be master for the

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    Write raspberry pi zero python script to take 10 seconds of measurements using accelerometer 9250 at sample rate of 800Hz or theoretical maximum. Repeat every hour. ...sample rate of 800Hz or theoretical maximum. Repeat every hour. Connect to a AWS database. Save data to database. SSH login will be provided to pi with sensor connected over spi.

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    Hello dear, I have this image table i produced through c embedded median filter code. i want this table to be passed through an FPGA microblaze and then deliver the new image. Thats all. interested? it is for today

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    Hello dear, I have this image table i produced through c embedded median filter code. i want this table to be passed through an FPGA microblaze and then deliver the new image. Thats all. interested? it is for today

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    Hello Dear, I have an urgent quick project. I have a...quick project. I have an embedded median filter of a table image 128*128 in c. I have the c code ready already. I just need you to take the median image 8*8 a nd pass it through FPGA with and without cache memory and then deliver the new images we get. It is for today please reply if interested

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    Hello Freelancers, I would like to pass my table image through a FPGA microblaze (both with cache and without cache) and have a s deliverables the 2 new images we get as results. This is for TODAY. Thank you in advance :)

    $10 - $30
    $10 - $30
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    ...guys I will need these simple tasks for $10USD the deadline is today 8 September. Description In C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory). I would like comments on the code and the new resulting image as deliverables. I attach the image table

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    ...that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory). I would comments on the code and the resulting image as deliverables. 2) I need just a divider in vhdl language to pass through and confirm with numbers that it works. Again comments on the code please. P.S.: 8 by 8 vhdl integer divider I attach the

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    I need you to develop some software for me. I would like this software to be developed using C in MPLAB X IDE for PIC32MX250F128B microcontroller

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    ...development and electrical test measurements. 3. Write embedded software code for a variety of targeted devices, 8051,PIC, AVR, ARM Cortex, Zigbee, Arduino and others to interface with lab test equipment and various devices under test. 4. Collect measurement data at the lab using MatLab, LabVIEW, and others, fed from embedded controllers, lab equipment

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    Good afternoon, I am searching for a hardware designer able to design and prototype a board using altium designer v16 with the following specs: Serial SPI 2.8" TFT LCD Module Display 320x240 Optional Touch Screen (resistive / capacitive) LiPo batt 3.7VDC (different caps supported) ESP32-WROOM-32D The ESP32 must be able to measure the remaining

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    articles needed for homesteading, eco website...all articles must be SEO friendly and not infringe copywrite or duplicate pre exsisting content. articles can be spun as long as its recogniced as new content online. note. we use wordpress, users with exoerience with auto blohging and article spinner with recomme ded wp plugins will be highly considered.

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    we need freelancer with following capabilities- 1. STM32F103 Programmer A.) Experience on CubeMX, Truestudio for code generation. B.) Strong hands on CAN, SPI, USART, 1-Wire, I2C, USB Protocols. C.) Ability to works with ADC, GPIO(IN, OUT) and WDT. D.) Prior programming experience in Automotive Domain. E.) Ability to power optimization through programming(sleep

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    ...- $15 USD until 6 or 7 of September. 1) in C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory) 2) I need just a divider in vhdl language to pass through and confirm with numbers that it works I attach the image table in the files section. Thank you

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    I need help with the structural in Xilinx. I will give you full details. Regards

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    ...looking for Electrical & Electronics engineer Mechanical Engineer Civil Engineer Engineers should be expert in following fields Arduino Matlab Raspberry Pi FPGA Verilog/VHDL Python PCB Design (Eagle/Altium) Solidworks AutoCAD if you are expert in any of above mentioned fields then you can place a bid. We will prefer fresh Freelancers but having

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    ...Paride, nice to meet you. i have got your conctact from Alessandro, a classmate. I am working on a easy Vhdl project, i already wrote all the code, the simolulation is working, but i need your help for two fast tasks: • I need to assign the pins on my FPGA, i can't find the correct pin of 2 serial signals. • i need you to check if the clock frequency is

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    verilog coding using putty or terminal. if you are interested i will give more information.

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    ...based on the ARM Cortex M4 STM32 MCU. The design of the system is already done including initialization, state-event transition diagram and main code template. Project is rather large and we need embedded programmers who are experienced with this target platform and with the tools we use for it. The design is fragmented into many small relatively simple

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    Need assistance to integrate existing drivers or dev...connect product into the Windows environment. Experience required: - Windows device driver integration or development for devices such as USB brides, EEPROMs, DSPs, etc. that use SPI, I2C, or UART. - Full cycle firmware development experience for embedded applications - Experience in Python/C/C++

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    Featured
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    I want help with system Verilog coding. I have a working code that I want revised a bit.

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    ...board (e.g. Microchip 44 pin Demo board) b) 240 x 128 dot LCD using T6963C controller IC with 8 bit data such as TG240128A-10 LCD c) 128 x 64 dot LCD with 4 wire serial SPI interface such as EA DOGL128-6 In your Bid, please indicate previous experiance of any similar task, whether you would use U8g2 or another library, Timescale in which you

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    Implement an AD2949 IC input block and some more

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    mtech Verilog project

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    looking for someone who can convert Open CL algorithm into FPGA Verilog project

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    Only experienced developer in FPGA mining and OpenCL GPU mining. I am looking for a freelancer who can convert Open CL algorithm into FPGA Verilog project.

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