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Design an alarmclock cum stop watch using FPGA

$250-750 USD

Closed
Posted over 12 years ago

$250-750 USD

Paid on delivery
I have a project which is to design an alarmclock cum stop watch by using Xilinx board and VHDL [login to view URL] time could be set by a numeric keypad or keyboard and display on the LCD. I have already bought the Xilinx board which the model is Spartan-3A. I am looking for a person who can do it.
Project ID: 1390658

About the project

15 proposals
Remote project
Active 12 yrs ago

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15 freelancers are bidding on average $412 USD for this job
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Hi, i have 4 years experience i vhdl programming for fpga's and cpld's
$250 USD in 0 day
5.0 (23 reviews)
5.5
5.5
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Dear zhangkun1020, I have great experience on such projects. You can see similar projects I have finished for other employees in Freelancer in my profile. Regards, Nikos
$750 USD in 14 days
5.0 (1 review)
4.0
4.0
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Hi, I have more than 4 years of experience in VLSI domain including Design, Verification and Implementation of the design in FPGA. Looking forward for further discussion.
$400 USD in 2 days
4.3 (2 reviews)
3.6
3.6
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I am 7 years experience in FPGA and ASIC design, have done similar projects on this website too.
$600 USD in 15 days
5.0 (1 review)
2.9
2.9
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We are a very experienced team who can tackle this task. Please check PMB for more details.
$400 USD in 20 days
1.8 (1 review)
1.0
1.0
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See your PM
$500 USD in 3 days
0.0 (0 reviews)
0.0
0.0
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$600 USD in 2 days
0.0 (0 reviews)
0.0
0.0
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Hi, I Am Electronic engineer with many capabilities. I am an expert if FPGA field for 10 years. I use ALTERA products, but familiar with XILINX. See private message.
$600 USD in 5 days
0.0 (0 reviews)
0.0
0.0
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Hello, i'm an experienced FPGA engineer, i can do the job for you
$250 USD in 7 days
0.0 (0 reviews)
0.0
0.0
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i already have code for it.
$380 USD in 5 days
0.0 (0 reviews)
0.0
0.0
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FPGA engineer with 6+ years of industry experience. Design & verification of digital circuits using VHDL, Verilog, SystemVerilog. Experience in synthesis, implementation and FPGA prototyping.
$250 USD in 5 days
0.0 (0 reviews)
0.0
0.0
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I can do this project. I am a Electrical Engineer and have experience using Xilinx board. Please let me know if you are interested.
$300 USD in 10 days
0.0 (0 reviews)
0.0
0.0
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Hi, I have experience from coding to generation of binary file that configures the PLD / FPGA. I can code in verilog, VHDL. The circuits that i have implemented in verilog is described briefly as follows 1. Debounce circuit which does the function of CPU in accepting the input sensor value (1 or 0), debounce of the 16 bit input and delivering to the software interface (Local bus). 2. Circuit functioning as CPU that controls and interfaces software (local bus) to DPRAM. sending data to DAC. 3. glue logic interfacing the CPU and ICs involved in power bring up.
$250 USD in 1 day
0.0 (0 reviews)
0.0
0.0
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BE,MS embedded systems holder with working on Altera FPGA and Xilinx board. i did multi channel uart using verilog and bldc motor using vhdl with pwm signals etc.I can handle ur project
$400 USD in 8 days
0.0 (0 reviews)
0.0
0.0
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Hi, Quality design solution and implementation assistance provided if offered. Please also see my PM. Thank you.
$400 USD in 15 days
0.0 (0 reviews)
0.0
0.0

About the client

Flag of SINGAPORE
Singapore, Singapore
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Member since Jan 16, 2012

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