Seeking full-time experienced ASIC Verification Engineers for an ongoing project (12 months+)
Knowledge of at least one industry standard protocol like Ethernet, PCIe, MIPI, USB, AMBA or similar.
Ability to update testbench components like reference model/SB, drivers and monitors.
Team player with excellent interaction skills.
Perl/shell scripting is a good to have.
4 to 8 years of experience in ASIC/SOC/IP/block level functional verification using SystemVerilog/UVM.
Experience developing test plans, test cases, sequences, constraint randomization, code and functional coverage, assertions and regression runs.
Having executed at-least 2 SoC/ASIC/IP Verification projects.
Good knowledge of debugging.