Hello if you have experience of Cadence software then i have some projects you would like to work .
s per discussion with my guide I have finalized my project, below are the requirements
Design and implement A 4 x 4 bit Vedic Multiplier
[login to view URL] 90nm technology
2. Implementation using 2 technologies
a. CMOS. [login to view URL]
3. Both design implementation to be done on cadence virtuoso software
[login to view URL] and layout for both cmos and mGDI techniques
[login to view URL] both simulations in terms of PDP,area, speed, overall performance parameters, delay.
I have implemented several multiplier architecture including 64bit vedic multiplier.
your requirement is about schematic design of the same. if you are OK with softwares other than virtuoso, please ping me