Aruna R.

I'm an Electronic and telecommunication Engineer who graduated from University of Moratuwa Sri Lanka in 2015. I have 3 year working experience in developing digital designs for applications in Video-coding, Data-encryption and video broadcasting fields. I'm familiar with leading FPGA and ASIC development and verification tools such as Xilinx Vivado, Questa, Synopsis DC, and Lattice Diamond. I'm interested in design and develop digital systems using System-verilog/VHDL and verification.