I have 9 years of engineering experience. I have worked on embedded develepment projects including analog design, digital design, PIC, Atmel, ARM, Ardunio using C, C++ languages.
I am a big fun of FPGA and I excel in Verilog, and intermediate design experience in VHDL.
I have developed telecom subsystem simulations in Matlab and Simulink, including QAM modulation/demodulation, BER calculation, Frequency hopping schemes and Jam ming Resistant communication architectures.