Analyze a SERDES solution to interface an FPGA with an ADC and a DAC at 500 MHz

Completed Posted 7 years ago Paid on delivery

$10-20 USD

Paid on delivery

Completed Paid on delivery

I requiere someone that could read the specs for Xilinx’s FPGA XC7A35T-1FTG256C and recommend where to connect a 500 MHz DAC and a 500 MHz ADC with LVDS interfaces using the IOSERDES modules within the FPGA.

Aditional information on the attached specs file

Electronics FPGA

Project ID: #11395317

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2 proposals Remote project Active 7 years ago

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cold512's Profile Picture
cold512

Hello! I'm an electronics engineer of the biggest telecommunication company of Vietnam. I have some exerience for 5 years of schematic and PCB layour designing. I'm good at: + Orcad + Altium + Eagles I always More

$30 USD in 1 day
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