VHDL mini projects. Read the details before quoting or messaging.

Closed Posted 2 years ago Paid on delivery
Closed Paid on delivery

entry level VHDL projects

1) Design of a Combinational Barrel Shifter/Rotator

2) Division by Constant

3) serial adder

4) FSM Design – Digital Lock

5) memory block copy

will not pay above 20$ for each assignment. so quote me accordingly. will pay fixed rate per assignment. will not allow tardiness.

Electrical Engineering Engineering Electronics Circuit Design Verilog / VHDL

Project ID: #31588660

About the project

7 proposals Remote project Active 2 years ago

7 freelancers are bidding on average $39 for this job

pilpanikoba

Hello How are you? Thanks for your posting job. I have read your project requirements and I am 100% sure I can complete your project perfectly. I have 15 years experience in Circuit & PCB layout design and Microcontrol More

$20 USD in 3 days
(14 Reviews)
6.2
IslamAdam998

Dear sir, I am a digital design engineer expert in VHDL and Verilog on both FPGA and ASIC flows. I can do all your projects.

$19 USD in 7 days
(42 Reviews)
6.0
moaazkh96

I will take 100 for all of them ----------------------------------------------------------------------------- Hi, I am digital design engineer, I have a broad knowledge of digital design in ASIC and FPGA using both V More

$100 USD in 7 days
(47 Reviews)
5.2
Miguelbucio

Hi I’m an expert in vhdl design and I’m interested in your project I can help you Send me a message to discuss the details

$20 USD in 7 days
(31 Reviews)
4.4
senthilps3

I am a researcher and assistant professor in electrical and computer engineering at university level. I can do all assignment of circuit design in VHDL. You can check the portfolio in my profile for latest project comp More

$20 USD in 7 days
(16 Reviews)
3.7
mhmdahmd789

I would take 70 USD on all the assingments This is my skill set C programming language, Embedded C, Assembly Language for (X86, PIC, ARM) Circuit prototyping & Design, GIT, JIRA KICAD, Proetus, AutoCAD, Solid WORKS M More

$70 USD in 7 days
(5 Reviews)
3.2
papumaharana555

Hello Sir/Ma'am, I am a RTL Design Engineer and working on IP development. I have a very good knowledge on Digital Design, RTL Design, Verilog HDL, RISC-V, AXI4 Lite, I2C, and JTAG. This is a very good opportunity to More

$25 USD in 7 days
(0 Reviews)
0.0