VHDL code for DCT and IDCT

Closed Posted Dec 7, 2015 Paid on delivery

₹750-1250 INR / hour

Closed

16x16 image to DCT store in a RAM/ROM and do IDCT to get back original 16x16 image.

Verilog / VHDL

Project ID: #9063336

About the project

8 proposals Remote project Active Jan 13, 2016

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8 freelancers are bidding on average ₹1008/hour for this job

loi09dt1's Profile Picture
loi09dt1

A proposal has not yet been provided

₹1111 INR / hour
(111 Reviews)
6.5
sujithkuroor's Profile Picture
sujithkuroor

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₹1111 INR / hour
(4 Reviews)
0.3
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farhad1370

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₹1111 INR / hour
(0 Reviews)
0.0
tonyfrel's Profile Picture
tonyfrel

Đề xuất vẫn chưa được gửi

₹888 INR / hour
(0 Reviews)
0.0
erilachaudhary's Profile Picture
erilachaudhary

I have been active academically on such projects such as: Particle Swarm Optimization Floating Point Unit Reed Solomon Decoder High Speed Multiplier Design MAC Unit and many more: I have also taught VHDL a numb More

₹1111 INR / hour
(0 Reviews)
0.0
kkvasan's Profile Picture
kkvasan

Hello, I have implemented 8*8 DCT transform on fpga such that PC will send 8*8 block pixels to FPGA throgh UART and it will process and DCT transformed data will send to PC again through UART. It is working on sparte More

₹1111 INR / hour
(0 Reviews)
0.0
merkas's Profile Picture
merkas

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₹863 INR / hour
(0 Reviews)
0.0
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