simple brute LCM calculator design in VHDL

Dear sir I have more than 8 years experience in digital design using vhdl please check my profile also please message me so that we can discuss

hi dear, i can do your project

I would like to bid this job because I am really suitable for job description: First: I am an C++/C/Mathlab/Electronics engineer who is very familiar with C++/C/Mathlab/VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird...Especialy, I participated in a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Besides,,I implemented the image conpression (wavelet transform). Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report.. Please contact me and let me know if you want any special requirement and do with lower price. Thank you.

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Worked in several hardware projects in university and my skills in VHDL are exceptional. I have extensive knowledge of arithmetic system implementation and DSP algorithm implementation. We can make a skype call to talk about your lab and explaing everything a bit more.

Hi, I am an Electrical Engineer with specialized in embedded systems. I have done many hardware designing projects on FPGA including its testing using simulation on ModelSim, and LSim (on Xilinx Design Suite). I have worked both in verilog,VHDL, and SystemC. I am familiar with all the used terms in ASM chart (with data-path). I have worked on many sequential based designs (including Soft-coded microprocessor) involving complex State machines. And considering that your project is very simple one. It can be done in 10-12 days by me. I can also accelerate the pace if that's your requirement. Looking forward to hear from your side. best regards, Hammad Tariq